1. Field of the Invention
The present invention relates to a high-voltage device structure, and more particularly, to a high-voltage device structure capable of suppressing parasitic currents.
2. Description of the Prior Art
In the past few years, accompanying the great expansion of electronic communication products, for example mobile phones, drivers of liquid crystal displays (LCDs) have come to be especially important. Products manufactured by a high-voltage process technology such as 32 V and 0.18 micrometer products are developed to be applied to the field of portable single chip thin film transistor (TFT) LCDs and so forth. A distinguishing feature of this technology is that different voltages are supplied to gate drivers, source drivers and controllers so that devices are able to be embedded in static random access memory (SRAM) for manufacturing smaller chips.
Please refer to FIG. 1. FIG. 1 is a plan view schematically illustrating a high-voltage device structure 10 according to the prior art. As shown in FIG. 1, a high-voltage device structure 10 disposed in a P-type substrate (not shown in FIG. 1) includes a first N-well 12 (indicated by the dashed line in FIG. 1), a second N-well 14 (indicated by the dashed line in FIG. 1), a channel diffusion region 16 (indicated by the dashed line in FIG. 1) connecting portions of the first N-well 12 and the second N-well 14, and a poly-silicon gate 18 covering the channel diffusion region 16. The high-voltage device structure 10 further includes a source diffusion region 20 located in the first N-well 12, a drain diffusion region 22 located in the second N-well 14, and a shallow trench isolation 24 located in the P-type substrate to properly isolate the source diffusion region 20, the drain diffusion region 22, and the channel diffusion region 16. The source diffusion region 20, the drain diffusion region 22, and the poly-silicon gate 18 are electrically connected with external circuits (not shown in FIG. 1) through contact plugs 26, 28, 30, 32, and 34.
For preventing a current leakage phenomenon in corners of the channel diffusion region 16, the high voltage device structure 10 is improved according to the prior art to let the length of the channel diffusion region 16 be longer than the length of the source diffusion region 20 and the drain diffusion region 22. Spaces where the channel diffusion region 16 is longer than the source diffusion region 20 and the drain diffusion region 22 form two spare regions 36 and 38. However, recent devices are smaller and smaller so that a lot of parasitic currents are generated in the spare regions 36 and 38, which have high gate voltages, to cause unpredictable I–V characteristic curves.